In general, the "power factor" of an electrical load refers to the ratio of the active power provided to the load to the apparent power applied to the load. The power factor is closely tied to the phase relationship between the electrical current drawn by the load and the electrical voltage applied to the load from a source of electrical power. If the drawn current is sinusoidal and completely in-phase with an applied sinusoidal voltage, then a unity power factor (i.e., a power factor of 1) is obtained.
High power factors are desirable for various reasons, including energy efficiency. The higher the power factor of a load, the lower the current demanded of the power supply utility for a given output power. Further, electronic loads with rectifier inputs and capacitive filtering frequently draw severely non-sinusoidal currents which results in poor power factor and can lead to distortion of the supply voltage. The higher the power factor, the lower the current that will be drawn from the supply for a given output power and the less the load will tend to distort the voltage waveform provided by the source of electrical power. To minimise supply currents and to avoid significant distortion of the voltage waveforms provided by power utilities, certain countries have promulgated regulations requiring electrical devices above a certain power rating to have a minimum power factor and limiting the harmonic content of the supply current.
In practice, electrical circuits often do not have unity power factors. In certain applications, such as motor control circuits that utilize a converter or inverter operating from a DC bus, the power factor can vary significantly from unity. Such circuits typically use a full wave bridge rectifier in combination with a relatively large DC bus capacitor to convert sinusoidal alternating input voltage into substantially constant direct voltage. In such arrangements, the rectifier output current should ideally follow the rectifier output voltage exactly. This is generally illustrated in FIG. 1 which illustrates an ideal load in which the current drawn by the circuit (indicated by the dashed line) is substantially in-phase with the applied voltage (indicated by the solid line).
Power factor correction (PFC) circuits are often used to improve the power factor of a load by modifying the current drawn by the rectifier such that it approaches that shown in FIG. 1. There are several commercially available PFC circuits. For example, Unitrode offers a family of high power-factor pre-regulator controllers under the model numbers UC1852, UC2852 and UC3852 and Linear Technology offers a power factor controller model number LT1248. These PFC devices are normally fabricated in analog integrated circuit chips and operate as analog circuits. In general, these devices use pulse width modulated switching to improve the power factors of circuits, such as convertors for switched reluctance motors, that utilize DC bus voltages derived from an alternating input.
FIG. 2 illustrates the use of an exemplary analog PFC chip 14. The circuit receives applied sinusoidal alternating voltage at the inputs of a full wave rectifier 4 and produces a full wave rectified sinusoidal voltage. The full wave rectified sinusoidal voltage is applied to one terminal of a filtering inductor 8. Coupled to the other terminal of the inductor 8 is a switching device 10, such as a power MOSFET or an IGBT. The other terminal of the switching device 10 is coupled to the negative rail of the DC bus. A PFC chip 14 provides switching signals to switch the switching device 10 on and off. The PFC chip receives as inputs (a) a measure of the full-wave rectified sinusoidal voltage at the output of the bridge rectifier 4 (V.sub.SIN), (b) a measure of the voltage across the DC bus (V.sub.RET) and (c) a measure or estimate of the current flowing in inductor 8, commonly obtained using a resistive shunt to measure current in the switching device 10. A DC bus capacitor 6 is coupled across the positive and negative rails of the DC bus. A diode 12 is provided to prevent current from flowing back from the load when the switch 10 is closed. In operation, the PFC chip opens and closes switching device 10 so that the load across the full wave rectifier 4 varies from the inductor 8 (when switch 10 is closed) to the inductor and the DC bus capacitor 6 (when switch 10 is opened). By properly switching switch 10 the current in inductor 8 is made to follow a waveform corresponding to the voltage variations at the output of full wave rectifier 4. The power factor of the system is thus improved. The operation of PFC chips is generally understood and is not addressed herein in detail.
The magnitude of the alternating voltage applied to the input of the full wave rectifier 4 is typically fairly high (as much as 240 volts r.m.s.), as is the magnitude of the DC bus voltage that appears across capacitor 6 (as much as 400V d.c.). Most PFC control circuits, however, additionally require a DC supply voltage that is substantially less than the DC voltage that appears across the DC bus typically 10 to 20 volts. Accordingly, some mechanism must be provided for providing a relatively low DC supply voltage 14 to the PFC chip. Moreover, the low DC supply voltage provided to the PFC controller must be referenced to the negative rail of the DC link.
Many approaches have been used to supply the relatively low DC voltage to the PFC control circuit. FIG. 3 illustrates one such approach. In FIG. 3 the low DC supply voltage for the PFC controller is provided by a capacitor 20 that is charged through a high power bleed resistor 16. A zener diode 18 controls the voltage across capacitor 20. One significant disadvantage of DC voltage supplies that employ bleed resistors is that a large voltage is dropped across the bleed resistor, whilst the current flowing through the bleed resistor must be at least equal to the current required by the PFC controller. This current produces considerable heat and represents a source of lost energy. This lost energy introduces inefficiencies into the system. A further disadvantage of DC voltage supplies using bleed resistors is that the bleed resistor must have characteristics capable of handling not only significant power dissipation but also the high voltage output of the full wave rectifier 4. Such resistors are often physically large, relatively expensive, and tend to increase the physical size and cost of systems using them.
Another common DC voltage supply for a PFC control circuit is illustrated in FIG. 4. In this circuit a second inductor 26 is inductively coupled to the filter inductor 8. The second inductor 26 is coupled to a storage capacitor 24 via a diode 30. During operation, PFC controller 14 will switch switching device 10 on and off at a fairly high frequency. The high frequency voltage components appearing across the inductor 8 as a result of this switching induce a current flow and voltage in inductor 26 through transformer action. This current flows through diode 30 and charges capacitor 24 to the desired DC voltage. A bleed resistor 22 is provided to charge capacitor 24 when the circuit is first energized, before the transformer action is sufficient to charge capacitor 24. As before, a zener diode 18 serves to regulate the voltage applied to the control circuit.
While a bleed resistor is still required, it can be of a much higher resistance than that of FIG. 3. The PFC control circuit will generally draw only a very small supply current until the capacitor 24 has charged to sufficient voltage to allow satisfactory operation of the PFC circuit. This allows resistor 22 to be of high resistance and hence the current flowing through it, and the power dissipated by it, will be relatively small. When the voltage across capacitor 24 has reached the required threshold, the PFC controller 14 will come into operation, drawing significant supply current. This current is initially supplied by capacitor 24 but is quickly supplied by the transformer action between inductors 8 and 26.
While the transformer-action DC voltage supply of FIG. 4 reduces the need for a large bleed resistor, it does not eliminate the need for such a resistor. Accordingly, the DC voltage supply of FIG. 4 suffers from the same disadvantages associated with the bleed resistor supply of FIG. 3, although not to the same extent. The additional winding 26 significantly increases the size and cost of the inductor 8 with which it must be combined. Moreover, the transformer action circuit of FIG. 4 is limited in that it is often insufficient to maintain an adequate voltage across capacitor 24. In these circumstances, it is necessary to reduce the value of resistance of the bleed resistor 22 to supplement the current from the inductor 26, bringing back the disadvantages already discussed.
In an effort to overcome the disadvantages associated with the circuits of FIGS. 3 and 4, approaches using more complex diode, capacitor and inductor arrangements have been proposed. FIG. 5 illustrates one such approach.
In FIG. 5 a circuit is provided in which capacitors 34 and 46 are arranged with diodes 32 and 36 to form a charge pump circuit. The charge pump circuit charges capacitor 46 which provides a DC voltage to the PFC chip 14.
As with the circuit of FIG. 4, the circuit of FIG. 5 includes a small bleed resistor 44 that is used to charge the capacitor 46 when the circuit is first energized. Zener diode 40 again serves to regulate the supply voltage to the PFC circuit. Once the PFC chip 14 is operational, the charge on capacitor 46 is maintained through the switching action of the PFC chip as follows. At an initial point in time, switching device 10 will be closed and the voltage at node A will be approximately the value of the negative rail of the DC bus (e.g, 0 volts). At this point, the voltage at node B will also be approximately 0 volts. At a later point in time, the operation of the PFC chip will have necessitated opening of switch 10. This will cause the voltage at node A to rise to approximately the value of the positive rail of the DC bus (e.g., 380 volts). The voltage across capacitor 34 cannot instantaneously change, and a charging current will flow through it as the voltage at node A rises. This charging current will bias diode 36 ON, and current will flow through capacitor 34, through diode 36 into capacitor 46, charging capacitor 46 to the desired low DC voltage level. Eventually, node A will reach the DC bus voltage approximately (e.g., 380 V), and the charging current flowing through capacitor 34 will cease. At this time, node B will be at approximately the same potential as the low voltage supply to the PFC chip and determined by zener diode 40. This might typically be 20 V, so that capacitor 34 is charged to a voltage of e.g., 360 V. In summary, at the time the switching device 10 is opened, capacitor 34 acts as a current source providing charge to the power supply capacitor 46.
At a later point in time, the PFC chip will close switching device 10 and the voltage at node A will again drop to approximately 0 volts. This switching event will also effectively place capacitor 34 in parallel with diode 32. This will discharge capacitor 34 through switching device 10 and diode 32. As the above indicates, in the circuit of FIG. 5 capacitor 34 approximates to a current source where the current is that charging capacitor 46 immediately after switching device 10 is opened, and where the capacitor discharges through switching device 10 immediately after switching device 10 is closed.
The DC voltage supply of FIG. 5 is limited in several respects. Initially it must be noted that all of the charge used to charge the power supply capacitor 46 is provided from capacitor 34. Accordingly, to prevent undesirable variations in the low voltage power supply, capacitor 34 must be sized sufficiently large so that power supply capacitor 46 is always adequately charged. This requirement of a sufficiently large capacitor 34 is disadvantageous in at least two respects. First, the capacitor 34 must be capable of withstanding high voltages. The larger the capacitor 34, the greater the cost and size of the capacitor and, hence, the larger the cost of the system. Second, as discussed above, while the charging current of capacitor 34 is used to charge the power supply capacitor 46 when the switching device is open, the charge across the capacitor 34 is discharged through switching device 10 when the switching device 10 is closed. Accordingly, switching device 10 must be sized to handle not only a portion of the current flowing through the full wave bridge 4, but must also dissipate all the energy stored in capacitor 34 at each instant of switch closure. This generally increases both the cost and the size of switching device 10. Further, the additional power dissipation in switching device 10 due to capacitor 34 results in a loss of power and increases the system inefficiencies. A further disadvantage of the power supply of FIG. 5 is that the power supply capacitor 46 is charged only when the switching device 10 is switched off. A still further disadvantage of the power supply of FIG. 5 is that, while it may be sufficient to drive the PFC controller 14, it typically cannot be used to drive other circuits, e.g., a motor control circuit or a system control circuit. Such a multi-purpose power supply would require significantly more output current than the circuit of FIG. 5. While one could theoretically increase the size of capacitors 34 and 46, such increases would necessitate a corresponding increase in the power handling capability of switching device 10, increase the cost of the system, and decrease the efficiency of the system.
As the foregoing demonstrates, known power supplies for PFC controllers generally result in the use of relatively expensive components or produce significant inefficiencies in the system. Moreover, such power supplies typically can power only PFC controllers and cannot power other circuits. It is an object of the present invention to overcome these and other problems in the prior art.
The present invention is defined in the accompanying independent claim. Some preferred features are recited in the dependent claims.